For the past several decades, the scaling of features in integrated circuits has been a driving force behind an ever-growing semiconductor industry. Scaling to smaller and smaller features enables increased densities of functional units on the limited real estate of semiconductor chips. For example, shrinking transistor size allows for the incorporation of an increased number of memory devices on a chip, lending to the fabrication of products with increased capacity. The drive for ever-more capacity, however, is not without issue. The necessity to optimize the performance of each device becomes increasingly significant.
Embedded SRAM and DRAM have problems with non-volatility and soft error rates, while embedded FLASH memories require additional masking layers or processing steps during manufacture, require high-voltage for programming, and have issues with endurance and reliability. Nonvolatile memory based on resistance change, known as RRAM/ReRAM, typically operates at voltages greater than 1V, typically requires a high voltage (>1V) forming step to form a filament, and typically have high resistance values limiting read performance.
For low voltage non-volatile embedded applications, operating voltages less than 1V may be desirable or advantageous. Furthermore, compatibility with CMOS logic processes may be desirable or advantageous. Thus, significant improvements are still needed in the area of non-standard device manufacture and operation.